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NXP Semiconductors /LPC176x5x /SYSCON /EXTMODE

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Interpret as EXTMODE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LEVEL_SENSITIVE)EXTMODE0 0 (LEVEL_SENSITIVE)EXTMODE1 0 (LEVEL_SENSITIVE)EXTMODE2 0 (LEVEL_SENSITIVE)EXTMODE3 0RESERVED

EXTMODE3=LEVEL_SENSITIVE, EXTMODE0=LEVEL_SENSITIVE, EXTMODE2=LEVEL_SENSITIVE, EXTMODE1=LEVEL_SENSITIVE

Description

External Interrupt Mode register

Fields

EXTMODE0

External interrupt 0 EINT0 mode.

0 (LEVEL_SENSITIVE): Level-sensitive. Level-sensitivity is selected for EINT0.

1 (EDGE_SENSITIVE): Edge-sensitive. EINT0 is edge sensitive.
EXTMODE1

External interrupt 1 EINT1 mode.

0 (LEVEL_SENSITIVE): Level-sensitive. Level-sensitivity is selected for EINT1.

1 (EDGE_SENSITIVE): Edge-sensitive. EINT1 is edge sensitive.
EXTMODE2

External interrupt 2 EINT2 mode.

0 (LEVEL_SENSITIVE): Level-sensitive. Level-sensitivity is selected for EINT2.

1 (EDGE_SENSITIVE): Edge-sensitive. EINT2 is edge sensitive.
EXTMODE3

External interrupt 3 EINT3 mode.

0 (LEVEL_SENSITIVE): Level-sensitive. Level-sensitivity is selected for EINT3.

1 (EDGE_SENSITIVE): Edge-sensitive. EINT3 is edge sensitive.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data